Suat Utku Ay | » Download Full Abstract
Assistant Professor, Electrical and Computer Engineering
With the advances in digital signal processing in recent years, a larger number of tasks are performed in the digital domain rather than through analog signal processing. To process a signal in the digital domain, it must first be digitized from an analog signal. The front-end analog-to-digital data converters (ADCs), which perform this digitization, have constrained the improvement provided by modern digital communication and signal processing systems. Many of the high-performance ADC topologies (e.g. delta-sigma, pipelined) utilize one or more powerhungry and speed-constrained operational amplifiers to perform critical operations including amplification, integration, and summation. These blocks are the primary bottleneck of the system, dominating power consumption of the technology and imposing a speed limitation for the entire system.