• Electronic Packaging
• IC Fabrication
• Advanced Microelectronics

Professor Barlow has served as the major professor for more than twenty graduate students and served as PI or Co-PI for over six million dollars of funded research engaging the microelectronics industry.  Dr. Barlow has published over 100 papers and is coeditor of The Handbook of Thin FilmTechnology (McGraw Hill, 1998), as well as for the Handbook of Ceramic Interconnect Technology (CRC Press, 2007).  He is also a fellow member of the International Microelectronics and Packaging Society (IMAPS) and a senior member of the Institute of Electrical and Electronic Engineers (IEEE).

Fred Barlow is currently working as a professor and the department chair in the Department  of Electrical and Computer Engineering at the University of Idaho with an emphasis on electronic packaging.  In the past, Dr. Barlow worked for several universities, including Virginia Tech and the University of Arkansas where he held the position of associate department head.

A Sample of Recent Publications

“Evaluation of Ceramic Substrates for High Power and High Temperature Applications," Srikanth Kulkarni, Shams Arifeen, Brian Patterson, Gabriel Potirniche, Aicha Elshabini, Fred Barlow, Proceedings of the Ceramic Interconnect and Ceramic Microsystems Technologies (CICMT) 2011 conference, PP 199-206 April, 2011, San Diego, CA.

“Waveguide Inductive Strip Filter Embedded in LTCC," Ehab Abousaif, A. Elshabini, and F. Barlow, Proceedings of the Ceramic Interconnect and Ceramic Microsystems Technologies (CICMT) 2011 conference, PP 43-49, April, 2011, San Diego, CA.

“High Power SiC Modules for HEVs and PHEVs,” M. Chinthavali, L. M. Tolbert, H. Zhang, J. H. Han, F.Barlow, B. Ozpineci, International Power Elecronics Conference (IPEC)- ECCE Asia Proceedings, June 21-24, 2010, Sapporo, Japan.

Fred Barlow, Jared Wood, Aicha Elshabini, Edward F. Stephens, Ryan Feeler, Greg Kemner, Jeremy Junghans, “Fabrication of Precise Fluidic Structures in LTCC," International Journal of Applied Ceramic Technology, Volume 6, No. 1, 2009, pp. 18-23.

“Finite Element Modeling of a Back Grinding Process for Through Silicon Vias," A. H. Abdelnaby, G. P. Potirniche, F. Barlow, A. Elshabini, R. Parker, Proceedings of the 2011 IEEE Workshop on Microelectronics and Electron Devices (WMED) 2011, Boise, ID, April. 2011, pp. 9-12

“High Density 50 kW SiC Inverter Systems Using a JFETs Based Six-Pack Power Module," proceedings of the PCIM Europe 2011.

Wang, G., E. Elvey, F. Barlow, and A. Elshabini, “Fabrication of Micro Vias for LTCC Substrates,” IEEE Transactions on Electronics Packaging Manufacturing, Volume 29, Issue 1, Jan. 2006, Page(s):32 – 41